CDP1831

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RCA ROM chip used in the RCA Studio II

    +-----+--+-----+
 A7 |1    +--+   24| 5v
 A6 |2           23| Clock
 A5 |3           22| NC
 A4 |4           21| CS1
 A3 |5           20| CS2
 A2 |6  CDP1831  19| /MRD
 A1 |7           18| CE0
 A0 |8           17| D7
 D0 |9           16| D6
 D1 |10          15| D5
 D2 |11          14| D4
GND |12          13| D3
    +--------------+
The "Clock" (ROM Pin 23) line is the High address latch line (Connector pin 19)
Chip selects (ROM Pins 21,20) are active high Chip selects, and are probably just wired to pin 24 ; they might be wired to connector pin 22
MRD! (ROM Pin 19) is the active low read signal, direct from the 1802 CPU
CEO (ROM Pin 18) is a pin that goes to logic '1' when a valid address which matches that masked into the ROM is selected.

Source: [1]